The RISC-V chip movement and why it matters for AI

Every chip in your phone, your laptop, your car, and your AI server is built on a proprietary architecture. ARM (owned by SoftBank/ARM Holdings) for mobile. x86 (owned by Intel and AMD) for desktops and servers. Both require licenses. Both are controlled by specific companies.

RISC-V is different. It’s an open instruction set architecture. No licensing fees. No permission needed. Anyone, anywhere, can design and build a RISC-V processor.

This matters more than most people realize. And it matters especially for AI.

What RISC-V is

An instruction set architecture (ISA) is the language a chip speaks. It defines what operations the processor can perform. ARM and x86 are proprietary ISAs: you need a license from the owning company to build a chip that speaks their language.

RISC-V (pronounced “risk-five”) was created at UC Berkeley in 2010 and released as an open standard. The specifications are free. Anyone can read them, implement them, modify them, and build chips based on them.

SiFive was among the first companies to commercialize RISC-V designs. Since then, the community has grown enormously. Hundreds of companies are now designing RISC-V chips for everything from IoT sensors to server processors.

Why China cares

US export controls restrict the sale of advanced chip designs and manufacturing equipment to China. ARM-based designs are subject to these controls because ARM is headquartered in the UK and licenses through entities subject to US jurisdiction. x86 is entirely American.

RISC-V sidesteps this. It’s an open standard. It’s not owned by any company. It’s not subject to export controls in the same way. China can build RISC-V processors using domestically designed tools and domestically manufactured chips (at older process nodes) without needing American permission.

Alibaba’s T-Head subsidiary has already produced high-performance RISC-V processors. Multiple Chinese companies are developing RISC-V-based AI accelerators. The Chinese government has identified RISC-V as a strategic priority.

This creates an interesting dynamic. The export controls were designed to maintain an American advantage in semiconductor technology. RISC-V, an American invention, is becoming the tool that allows others to route around those controls.

Why this matters for AI

AI chips are mostly GPUs and specialized accelerators designed for matrix multiplication. NVIDIA’s dominance in this space is built on their proprietary architecture (CUDA + their GPU microarchitecture). Buying an NVIDIA chip means buying into NVIDIA’s stack.

RISC-V offers an alternative path. You could build an AI accelerator on a RISC-V foundation, with custom extensions for neural network operations. The base architecture is free. The extensions are yours to design. The result is an AI chip that doesn’t depend on any single company’s licensing.

Several startups are doing exactly this. And NVIDIA itself is using RISC-V cores for control processors within their GPUs (managing the chip’s internal operations while the GPU cores do the heavy compute).

If RISC-V AI accelerators become competitive, the power dynamics of the chip industry shift. You go from “NVIDIA controls the AI hardware stack” to “anyone can build the AI hardware stack.” That’s a significant change.

The Linux parallel

RISC-V reminds me of Linux in the 1990s. A free, open alternative to proprietary systems, dismissed initially by incumbents, adopted first by enthusiasts and underfunded labs, gradually growing until it ran most of the world’s servers.

Linux didn’t kill Windows or macOS. It carved out its own territory: servers, embedded systems, mobile (Android is Linux). RISC-V probably won’t kill ARM or x86. But it could become the default for specific domains: IoT, embedded AI, edge computing, and potentially server chips in countries that can’t or won’t license proprietary architectures.

The pattern is familiar. Open standards start slow. They grow in the places where the proprietary options are too expensive, too restricted, or too controlled. Then they reach a tipping point and become the default.

RISC-V isn’t at that tipping point yet. But the trajectory is clear. The number of RISC-V chips shipped is doubling yearly. The software tooling is maturing. The performance gap with ARM and x86 is narrowing.

IEEE Spectrum has good technical coverage of where RISC-V stands. I recommend following the RISC-V Foundation’s updates for anyone interested in the open hardware movement.

The bottom of the hardware stack, the instruction set that tells the chip what to do, has been proprietary for the entire history of computing. RISC-V is trying to change that. If it succeeds, the implications for AI, for geopolitics, and for who gets to build the future, are immense.

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